1. Field of the Invention
The present invention relates to a combination substrate in order to mount a package substrate with a semiconductor element mounted thereon. In particular, it relates to a combination substrate wherein an electrical connection is made between package substrates and a substrate in POP (Package on Package) which is structured with at least two substrates.
2. Discussion of the Background
There have been demands for higher mounting densities for electronic components. The background to the demands is to secure mounting spaces within the limited substrate areas due to added and concentrated functions. They have been addressed when it comes to a cell phone, to illustrate, with a package substrate wherein two IC chips are laminated and the terminals of the IC chips and of the substrate are connected with wire-bonding, etc., and by turning that into a multistage package which is laminated with so-called package-on-package wherein a package is formed on a package for a component which has required a package substrate wherein two IC chips had been mounted.
Japanese Laid-Open Patent Publication No. Hei 6-163811, Japanese Laid-Open Patent Publication No. 2001-230515, Japanese Laid-Open Patent Publication No. 2001-85603, and Japanese Laid-Open Patent Publication No. 2001-210954 disclose multistage packages. The contents of these publications are incorporated herein by reference in their entirety.